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Jianning Wang Jianning Wang is a Ph.D. Candidate in the Electrical and Computer Engineering Department. His current research is designing ultra-low power RF circuit. From 2003-2004, he worked on RF passive devices modeling (Monolithic inductors and SOI Varactors) and FinFET (Double-Gate Fully Depleted SOI) modeling. He also programmed to control Lab test equipments using LabVIEW.
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